Base-2 Positional Notation & Digital Architecture
How transistors, logic voltages, and powers of two represent every piece of modern digital data.
At the hardware level of silicon microprocessors, all data is stored and manipulated through voltage differentials (high voltage representing 1, ground or low voltage representing 0). In the Base-2 (binary) numeral system, each digit position represents an ascending power of two ($2^0, 2^1, 2^2, 2^3, \dots$):
Binary to Decimal Positional Evaluation Formula
For example, the 8-bit binary byte 10110101₂ evaluates to: 128 + 0 + 32 + 16 + 0 + 4 + 0 + 1 = 181₁₀.
| Decimal (Base-10) | 4-Bit Binary (Base-2) | Hexadecimal (Base-16) | Octal (Base-8) | Binary Power Term |
|---|---|---|---|---|
| 0 | 0000 | 0x0 | 00 | Zero state |
| 1 | 0001 | 0x1 | 01 | 2⁰ (LSB) |
| 2 | 0010 | 0x2 | 02 | 2¹ |
| 4 | 0100 | 0x4 | 04 | 2² |
| 8 | 1000 | 0x8 | 10 | 2³ (Nibble MSB) |
| 10 | 1010 | 0xA | 12 | 2³ + 2¹ |
| 15 | 1111 | 0xF | 17 | Full 4-bit nibble saturated |
Bitwise Logic Gates & Truth Table
How AND, OR, XOR, and NOT evaluate binary bits in parallel to execute CPU-level instructions.
Unlike arithmetic operations that carry numbers between bit columns, bitwise operations execute independently on matching pairs of bits at identical indices.
| Bit A | Bit B | A & B (AND) | A | B (OR) | A ^ B (XOR) | ~A (NOT A) |
|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 1 |
| 0 | 1 | 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 | 1 | 0 |
| 1 | 1 | 1 | 1 | 0 | 0 |
XOR has the unique mathematical property of reversibility: (A ^ B) ^ B = A. This makes XOR the fundamental building block of One-Time Pads, stream ciphers, and hash functions.
Network routers apply bitwise AND between an IPv4 address and its Subnet Mask to instantly isolate the network ID from the host ID without division operations.
Two's Complement: How CPUs Store Negative Numbers
Why modern computer hardware universally abandoned Sign-and-Magnitude in favor of Two's Complement.
Early computing architectures experimented with Sign-and-Magnitude, where the most significant bit (MSB) simply flagged negative signs. This produced two major hardware flaws: it created two zeros (+0 and -0), and required separate, slower circuits for addition and subtraction.
The Two's Complement Conversion Algorithm
+5 = 0000 0101₂
~00000101 = 1111 1010₂
-5 = 1111 1011₂
By using Two's complement, a CPU subtracts A - B by performing standard addition: A + (-B), utilizing the exact same arithmetic logic unit (ALU) circuitry.
Binary Arithmetic & Fast Multiplication via Bit Shifts
Rules of binary addition, subtraction with borrows, and ultra-fast bit shifting algorithms.
Binary Addition Principles
- 0 + 0 = 0
- 0 + 1 = 1
- 1 + 0 = 1
- 1 + 1 = 10₂ (Sum 0, Carry 1)
- 1 + 1 + 1 = 11₂ (Sum 1, Carry 1)
Bit Shift Multiplications & Divisions
Left Shift (A << k): Shifts all bits left by k places, appending zeros. Multiplies decimal value by 2^k.
Right Shift (A >> k): Shifts bits right by k places. Discards the lowest bits, performing integer division by 2^k.
Worked Engineering & Computing Examples
Three real-world computational problems solved with full bit alignments and derivations.
Binary Addition with Carries
A: 1011₂ (11₁₀)
B: 0110₂ (6₁₀)
Carries: 1110
Result: 10001₂ = 17₁₀ (0x11)
Bit 0: 1+0=1. Bit 1: 1+1=0 (c1). Bit 2: 0+1+c1=0 (c1). Bit 3: 1+0+c1=0 (c1). Output carries to Bit 4.
Subnet Masking with AND
IP: 10000010₂ (130₁₀)
Mask: 11000000₂ (192₁₀)
Gate: Bitwise AND (&)
Net ID: 10000000₂ = 128₁₀ (0x80)
Bits 7-6 are preserved, while host bits 5-0 are forced to zero, isolating the subnet address.
Bitmask Toggling with XOR
State: 00101100₂ (44₁₀)
Toggle: 00001000₂ (Bit 3)
Gate: Bitwise XOR (^)
New State: 00100100₂ = 36₁₀
Bit 3 transitions from 1 to 0 without altering any of the other 7 permission flags.
Computing Precision & Client-Side Safety
Native bit width handling, overflow safety flags, and zero-telemetry calculations.
100% In-Browser Execution
All mathematical computations and bitwise logic operations execute locally on your device without server calls.
Hardware Bit Modes
Support for Unsigned, 8-bit byte, 16-bit word, and 32-bit dword representation with strict hardware overflow detection.
Quad-Base Translation
Instant real-time conversion between Binary, Decimal, Hexadecimal, and Octal formats for quick debugging.
Frequently Asked Questions
Common questions regarding two's complement, bitwise shifts, and sign representations.
Q:How are negative binary results computed in this tool?
Negative values use 32-bit two's complement. Bits are inverted and 1 is added, matching standard processor arithmetic.
Q:What happens when I left-shift a binary number?
Each shift left doubles the decimal value. For example, 0101 (5) shifted by 1 becomes 1010 (10).
Q:Does the calculator support fractional binary inputs?
No. Inputs must be whole numbers. Floating-point binary with a binary point is not currently supported.
Q:Why does bitwise NOT return a different sign than expected?
NOT inverts all 32 bits, so the result reflects two's complement. NOT of 0001 yields -2, not -1.